1. Field of the Invention
The present invention relates to a display and a method for repairing defects thereof and, more particularly, to a liquid crystal display and a method for repairing defects thereof in which defects such as a short circuit between layers or a short circuit in a single layer that have occurred at steps for manufacturing the liquid crystal display are easily recovered (repaired) to provide a good product with a probability higher than that in the related art.
2. Description of the Related Art
FIG. 30 shows an example of a configuration of an active matrix liquid crystal display. The liquid crystal panel has a structure in which two glass substrates, i.e., a TFT substrate 200 formed with TFTs (thin film transistors) and the like and a CF substrate 202 formed with a color filter (CF) and the like are in a face-to-face relationship with each other and are bonded together with liquid crystals 204 sealed therebetween.
FIG. 31 shows an equivalent circuit of elements formed on the TFT substrate 200. A plurality of gate bus lines 218 extending horizontally in FIG. 31 are formed on the TFT substrate 200, and a plurality of drain bus lines 220 extending vertically in FIG. 31 are formed in parallel with each other in an intersecting relationship with the gate bus lines. Each of the regions enclosed by the plurality of gate bus lines 218 and drain bus lines 220 serves as a pixel region. A TFT 222 and a display electrode 224 made of a transparent electrode material are formed in a pixel region. Each TFT 222 is connected to an adjacent drain bus line 220 at a drain electrode thereof, to an adjacent gate bus line 218 at a gate electrode thereof and to a display electrode 224 at a source electrode thereof. Storage capacitor bus lines 226 are formed on the substrate surface under the display electrodes 224 in parallel with the gate bus lines 218. The TFTs 222 and the bus lines 218, 220 and 226 are formed using a photolithographic step at which a series of semiconductor processes, i.e., film formation, resist application, exposure, development, etching and resist removal are repeated.
Referring again to FIG. 30, a gate driving circuit 206 loaded with driver ICs for driving the plurality of gate bus lines 218 and a drain driving circuit 208 loaded with driver ICs for driving the plurality of drain bus lines 220 are provided on the TFT substrate 200 which is provided in a face-to-face relationship with the CF substrate 202 with the liquid crystals 204 sealed therebetween. Those driving circuits 206 and 208 output scan signals and data signals to predetermined gate bus lines 218 and drain bus lines 220 based on predetermined signals output by a control circuit 216. A polarizer 212 is provided on the surface of the TFT 200 opposite to the surface thereof on which the elements are formed, and a back-light unit 214 is attached to the surface of the polarizing plate 212 opposite to the TFT substrate 200. A polarizer 210 in a crossed Nicol relationship with the polarizer 212 is attached to the surface of the CF substrate 202 opposite to the surface thereof on which the color filter is formed.
The structure of the TFT 222 may be an inverted staggered type in which source and drain electrodes are formed above a gate electrode on a substrate surface, a staggered type in which a gate electrode is formed above source and drain electrodes, a planar type or the like. FIGS. 32a, 32b and 32c show a schematic configuration of a pixel region having a typical inverted staggered type TFT. FIG. 32a is an illustration of the pixel region obtained by viewing the substrate surface from above, and FIG. 32b shows a section of the TFT taken along the line A—A in FIG. 32a. FIG. 32c shows a section of the region where the gate bus line 218 (or storage capacitor bus line 226) intersects the drain bus line taken along the line B—B in FIG. 32a. 
As shown in FIGS. 32a, 32b and 32c, the TFT 222 is formed in the vicinity of the intersection between the gate bus line 218 and drain bus line 220. A drain electrode 230 of the TFT 222 is formed by being extended from the drain bus line 220. The edge portion of the drain electrode 230 is located at one edge of an active semiconductor layer 232 formed of amorphous silicon (a-Si) or polysilicon on the gate bus line 218 and a channel protection film 242 formed thereon.
On the other hand, a source electrode 228 is formed at the other edge of the active semiconductor layer 232 and channel protection film 242. In such a configuration, the region of the gate bus line 218 directly under the channel protection film 242 serves as a gate electrode of the TFT 222.
As shown in FIG. 32b, a gate insulation film 240 is formed on the gate bus line 218, and the active semiconductor layer 232 that constitutes a channel is formed on the gate insulation film 240 directly above the gate bus line 218. An auxiliary capacitor bus line 226 is also formed which horizontally extends substantially in the middle of the pixel region. A storage capacitor electrode 236 for each pixel is formed above the auxiliary capacitor bus line 226 with the insulation film 240 interposed therebetween. A pixel electrode 224 constituted by a transparent electrode is formed above the source electrode 228 and storage capacitor electrode 236. The pixel electrode 224 is electrically connected to the source electrode 228 through a contact hole 234 provided in a protective film 244 formed thereunder. The pixel electrode 224 is also electrically connected to the storage capacitor electrode 236 through a contact hole 238.
While the above-described TFT structure is of the inverted staggered type, for example, staggered type and planar type devices have an inverted structure in which a drain electrode is in the bottom layer and a gate electrode is located above the same. In any of those structures, what is to be noted is the fact that those metal layers are stacked in an intersecting relationship with each other with an insulation film interposed therebetween.
FIGS. 33a and 33b show a conventional method for repairing a short-circuit between metal layers caused by some reason. FIG. 33a is an illustration of a pixel region obtained by viewing the substrate surface from above, and FIG. 33b shows a section taken along the line A—A in FIG. 33a. FIG. 34 shows a repair line formed on a TFT substrate 200. Components having the same functions and operations as those of the components described with reference to FIGS. 30 through 32c are indicated by like reference numbers and not be described here.
FIGS. 33a and 33b show a state in which the storage capacitor bus line 226 and drain bus line 220 penetrate through the gate insulation film 240 to cause an inter-later short-circuit 290. The inter-layer short-circuit 290 causes a line defect because it hinders the application of a predetermined voltage to the drain bus line 220. A repair is performed to repair the display defect using a laser.
According to this repairing method, first, the drain bus line 220 of the defective pixel is irradiated with a laser beam to be cut in a cutting position 300 between the drain electrode 230 and inter-layer short-circuit 290. Second, the drain bus line 220 is irradiated with a laser beam to be cut in a cutting position 301 between the inter-layer short-circuit 290 and the drain electrode 230 of the next pixel. This isolates the shorting position of the inter-layer short-circuit 290.
Third, as shown in FIG. 34, spare lines (repair lines) 302 and 303 provided in advance for a repair on the TFT substrate 200 are used to apply a predetermined voltage to the drain bus line 220 thus cut from the drain driving circuit 208.
A plurality of drain bus lines 220 formed in parallel at equal intervals in a display area I shown in FIG. 34 converge at an extraction wiring portion II to be connected to a TCP (tape carrier package) which is an FPC (flexible printed circuit) loaded with driver ICs mounted using TAB (tape automated bonding) at a terminal portion III.
The repair line 302 is formed such that it intersects the plurality of drain bus lines 220 with the insulation film interposed at the end of the display area I on the side of the drain driving circuit 208 and is extended along with the plurality of drain bus lines 220 through the extraction wiring portion II to be connected to the TCP at the terminal portion III. The repair line 302 is formed of the same metal as used to form the gate bus lines 218 and is normally insulated from the drain bus lines 220 by the insulation film 240.
When a defect attributable to an inter-layer short-circuit 290 occurs at a certain drain bus line 220, a region 304 where the drain bus line 220 and the repair line 302 intersect with each other is irradiated with a laser beam to fuse those wiring metals together, which establishes connection and conduction. Referring to conditions for the laser irradiation at such a repair, the laser must have intensity as shown in FIG. 1d which will be described later.
The repair line 302 extends from the gate driving circuit 206 through the printed circuit board 250 to the repair line 303 on the unloaded side of the driving circuit. The repair line 303 on the unloaded side of the driving circuit is also formed of the same metal as used for the formation of the gate bus lines 218 and is formed such that it intersects the plurality of drain bus lines 220 with the insulation film 240 interposed therebetween. During a repair, a region 304 where a drain bus line 220 having an inter-layer short-circuit 290 and the repair line 302, intersect with each other is irradiated with a laser beam, and a region 305 where the drain bus line 220 and the repair line 303 intersect with each other is also irradiated with a laser beam to fuse both of the lines, which establishes connection and conduction. Thus, a predetermined voltage is applied to the drain bus line 220 from which the shorting portion of the inter-layer short-circuit 290 has been cut off also from the side opposite to the drain driving circuit 208 to perform a repair for preventing the occurrence of the line defect.
The number of the repair lines 302 and 303 determines the number of defects that can be relieved among a plurality of defects that have occurred in one panel. In view of demands for panels with smaller frames in these days, however, it is not preferable to increase the repair lines 302 and 303 because the area of the substrate occupied by the repair lines 302 and 303 is increased. Further, since an extra capacitor is generated at the regions where the repair lines 302 and 303 intersect the drain bus lines 220, the drain driving circuit 208 has an increased load, and this is another factor that discourages the increase of the repair lines. For example, even if two repair lines are provided in a panel, inter-later short-circuits at three or more drain bus lines disable a complete repair, and this results in a defective panel. Repair lines are frequently required not only for inter-layer short-circuits but also for breakage of drain bus lines 220 and short-circuits in a single layer, and those defects can render a panel defective when they occur in combination even if there is only one drain bus line that has an inter-layer short-circuit.
A repair utilizing laser irradiation does not necessarily result in successful connection with a probability of 100%. The optimization of laser conditions can only provides a probability in the range from 60 to 80%, although it depends on the metal materials used. The probability can only be improved up to about 90% even if the number of locations to be irradiated with a laser beam is increased and, accordingly, defective panels are produced in a probability of 10%.
A repair of connection according to the related art utilizing laser irradiation involves irradiation of a multiplicity of locations in a panel with a laser beam even if there is an inter-layer short-circuit in only one location, which has resulted in a problem in that the repair becomes very much complicated and induces operational errors such as misaddressing a location to be irradiated with a laser beam.
As described above, according to the related art, repair lines 302 and 303 are provided on an assumption that a line breakage or the like exists in a display area I as shown in FIG. 34. Recent demands for panels with smaller frames have increased the possibility of defects such as breakage and shorting of a lines because such demands have necessitated a smaller line width and a smaller line interval at an extraction wiring portion II. This has resulted in a need for a repairing method which can cope with defects at an extraction wiring portion II.